Test time minimization for hybrid BIST of core-based systems

Jervan , Eles , Peng , Ubar
asian test symposium 21 ( 6) 318 -323

36
2003
Keynote Presentations

Daniel D GAJSKI , Krishnendu CHAKRABARTY , Janusz RAJSKI , Marco BUCCI

Letícia BOLZANI Luciano CAIMI Luiz Filipe VIEIRA Luz BALADO

Adoracion RUEDA , Alain BRUN , Alex ORAILOGLU , André IVANOV

EEG Analyzer prototype based on FPGA

Maksim Jenihhin , Hiie Hinrikus , Dmitri Mihhailov , Vadim Pesonen
international symposium on image and signal processing and analysis 101 -106

5
2011
Dependability evaluation in fault-tolerant systems with high-level decision diagrams

Maksim Jenihhin , Jaan Raik , Raimund Ubar , Gert Jervan
Computer science meets automation: 52. IWK, Internationales Wissenschaftliches Kolloquium ; proceedings ; 10 - 13 September 2007 / Faculty of Computer Science and Automation, [Technische Universität Ilmenau. Hrsg.: Peter Scharff].#R#<br/>Ilmenau : Univ.-Verl., 2007#R#<br/>ISBN 978-3-939473-17-6#R#<br/>Vol. II#R#<br/>S. 147-152 147 -152

2007
Multi-Fragment Markov Model Guided Online Test Generation for MPSoC.

Maksim Jenihhin , Jaan Raik , Leonidas Tsiopoulos , Jüri Vain
ICTERI 594 -607

1
2017
High-Level Combined Deterministic and Pseudo-exhuastive Test Generation for RISC Processors

Maksim Jenihhin , Jaan Raik , Raimund Ubar , Adeboye Stephen Oyeniran
european test symposium 1 -6

2
2019
Accelerating Transient Fault Injection Campaigns by using Dynamic HDL Slicing

Maksim Jenihhin , Jaan Raik , Ahmet Cagri Bagbaba , Christian Sauer
international symposium on system on chip 1 -7

3
2019
Early RTL Analysis for SCA Vulnerability in Fuzzy Extractors of Memory-Based PUF Enabled Devices

Maksim Jenihhin , Sven Goossens , Roel Maes , Kolin Paul
ifip ieee international conference on very large scale integration 16 -21

2020
Definition of the DIAMOND Platform

Maksim Jenihhin , Jaan Raik , Robert Könighofer , Alexander Finder

2010
Gate-Level Graph Representation Learning: A Step Towards the Improved Stuck-at Faults Analysis

Maksim Jenihhin , Maximilien Glorieux , Dan Alexandrescu , Thomas Lange
international symposium on quality electronic design 24 -30

2021
Rejuvenation of NBTI-Impacted Processors Using Evolutionary Generation of Assembler Programs

Francesco Pellerey , Maksim Jenihhin , Giovanni Squillero , Jaan Raik
asian test symposium 304 -309

5
2016
A scalable model based RTL framework zamiaCAD for static analysis

Anton Tsepurov , Gunter Bartsch , Rainer Dorsch , Maksim Jenihhin
2012 IEEE/IFIP 20th International Conference on VLSI and System-on-Chip (VLSI-SoC) 171 -176

14
2012
Upgrading QoSinNoC: Efficient Routing for Mixed-Criticality Applications and Power Analysis

Serhiy Avramenko , Siavoosh Payandeh Azad , Behrad Niazmand , Massimo Violante
ifip ieee international conference on very large scale integration 207 -212

2
2018
On NBTI-induced Aging Analysis in IEEE 1687 Reconfigurable Scan Networks

Aleksa Damljanovic , Giovanni Squillero , Cemil Cem Guursoy , Maksim Jenihhin
ifip ieee international conference on very large scale integration 335 -340

2019
BASTION: Board and SoC test instrumentation for ageing and no failure found

Artur Jutman , Christophe Lotz , Erik Larsson , Matteo Sonza Reorda
design, automation, and test in europe 115 -120

2
2017
A DFT scheme to improve coverage of hard-to-detect faults in FinFET SRAMs

Guilherme Cardoso Medeiros , Cemil Cem Gursoy , Lizhou Wu , Moritz Fieback
design, automation, and test in europe 792 -797

1
2020
APRICOT: A framework for teaching digital systems verification

Jaan Raik , Maksim Jenihhin , Anton Chepurov , Uljana Reinsalu
2008 19th EAEEIE Annual Conference 172 -177

1
2008
Special Session: AutoSoC - A Suite of Open-Source Automotive SoC Benchmarks

Felipe Augusto da Silva , Ahmet Cagri Bagbaba , Annachiara Ruospo , Riccardo Mariani
vlsi test symposium 1 -9

2020
Constraint-based test pattern generation at the Register-Transfer Level

Taavi Viilukas , Jaan Raik , Maksim Jenihhin , Raimund Ubar
design and diagnostics of electronic circuits and systems 352 -357

7
2010