Design of an intrinsically-linear double-VCO-based ADC with 2 nd -order noise shaping
Xing , Gielen , Craninckx , Gao
design, automation, and test in europe 1215 -1220
23
2012
RF Integrated Circuits in Standard CMOS Technologies
Crols , Janssens , Borremans , Kinget
european solid state circuits conference 11 -18
1996
A 5-GHz BiCMOS variable-gain low noise amplifier with inductorless low-gain branch
Mingxu Liu , J. Craninck
european solid-state circuits conference 223 -226
3
2005
Time Interval Analyzing System and a Method Thereof
Kameswaran Vengattaramane , Jonathan Borremans , Jan Craninckx
5
2011
A 500kHz-10MHz multimode power-performance scalable 83-to-67dB DR CTΔΣ in 90 nm digital CMOS with flexible analog core circuitry
Pieter Crombez , Geert Van der Plas , Michiel Steyaert , Jan Craninckx
symposium on vlsi circuits 70 -71
19
2009
An 11.6-19.3mW 0.375-13.6GHz CMOS frequency synthesizer with rail-to-rail operation
Julien Ryckaert , Arnd Geis , Jan Craninckx , Gerd Vandersteeny
design, automation, and test in europe 697 -701
2
2010
A 2.1 mW 11b 410 MS/s dynamic pipelined SAR ADC with background calibration in 28nm digital CMOS
Bob Verbruggen , Badr Malki , Jan Craninckx , Guy Glorieux
symposium on vlsi circuits 268 -269
40
2013
Baseband Analog Circuits for Software Defined Radio
Vito Giannini , Jan Craninckx , Andrea Baschirotto
30
2008
A 0.9V low-power 0.4–6GHz linear SDR receiver in 28nm CMOS
Barend van Liempd , Jonathan Borremans , Ewout Martens , Jan Craninckx
symposium on vlsi circuits
19
2013
A 48-dB DR 80-MHz BW 8.88-GS/s bandpass ΔΣ ADC for RF digitization with integrated PLL and polyphase decimation filter in 40nm CMOS
Andre Bourdoux , Geert Van der Plas , Aissa Couvreur , Peter Van Wesemael
symposium on vlsi circuits 40 -41
4
2011
A design methodology for fully reconfigurable delta-sigma data converters
Georges Gielen , Yi Ke , Jan Craninckx
design, automation, and test in europe 1379 -1384
2
2009
Wideband Receivers
Jan Craninckx , David Ngo
international solid-state circuits conference
2008
Rectifier and integrator circuit for disk drive servo system
Wim Dehaene , Peter Real , Mairtin Walsh , Jan Craninckx
10
1995
Analysis of fractional spur reduction using SD noise cancellation in digital PLL
Kameswaran Vengattaramane , Michiel Steyaert , Jan Craninckx
international conference on circuits 2397 -2400
2009
Alternative peak detection system for high-speed amplitude measurement in EIT systems
Wim Dehaene , Willy Sansen , Jan Craninckx , Michel Steyaert
Innovation and Technology in Biology and Medicine 104 -108
1994
An in-band full-duplex transceiver prototype with an in-system automated tuning for RF self-interference cancellation
Bjorn Debaillie , Barend van Liempd , Rafik Guindi , Mina Mikhael
1st International Conference on 5G for Ubiquitous Connectivity
13
2014
Millikelvin temperature cryo-CMOS multiplexer for scalable quantum device characterisation
Fahd A. Mohiyaddin , Steven Brebels , I. P. Radu , Bogdan Govoreanu
arXiv: Quantum Physics
9
2020
A 7-band CCD-in-CMOS multispectral TDI imager
Jonathan Borremans , Jan Van Olmen , Maarten Rosmeulen , David San Segundo Bello
International Image Sensor Workshop 2017 129 -132
1
2017
A 1-MS/s to 1-GS/s Ringamp-Based Pipelined ADC With Fully Dynamic Reference Regulation and Stochastic Scope-on-Chip Background Monitoring in 16 nm
Benjamin Hershberg , Ewout Martens , Jan Craninckx , Jorge Lagos
IEEE Journal of Solid-state Circuits 56 ( 4) 1227 -1240
12
2021
In-Pixel Storage Techniques for CMOS Burst-Mode Ultra-High-Speed Imagers
Piet Wambacq , Jonathan Borremans , Andreas Süss , Maarten Rosmeulen
International Image Sensor Workshop 2017 312 -315
2
2017
michel steyaert Ewout Martens Jonathan Borremans Vito Giannini Barend van Liempd Bob Verbruggen Nereo Markulić Benjamin Hershberg Ryckaert Julien Andrea Baschirotto Liesbet Van der Perre Andre Bourdoux Kuba Raczkowski Jorge Lagos Maarten Kuijk Georges Gielen Pierluigi Nuzzo Qixian Shi Vincenzo Chironi