CORF: Coalescing Operand Register File for GPUs

Hodjat Asghari Esfeden , Farzad Khorasani , Hyeran Jeon , Daniel Wong
architectural support for programming languages and operating systems 701 -714

16
2019
RIC: Relaxed Inclusion Caches for Mitigating LLC Side-Channel Attacks

Mehmet Kayaalp , Khaled N. Khasawneh , Hodjat Asghari Esfeden , Jesse Elwell
design automation conference 7

43
2017
In-register parameter caching for dynamic neural nets with virtual persistent processor specialization

Farzad Khorasani , Hodjat Asghari Esfeden , Nael Abu-Ghazaleh , Vivek Sarkar
international symposium on microarchitecture 377 -389

32
2018
BOW: Breathing Operand Windows to Exploit Bypassing in GPUs

Hodjat Asghari Esfeden , Amirali Abdolrashidi , Shafiur Rahman , Daniel Wong
2020 53rd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO) 996 -1008

2
2020
RegMutex: inter-warp GPU register time-sharing

Farzad Khorasani , Hodjat Asghari Esfeden , Amin Farmahini-Farahani , Nuwan Jayasena
international symposium on computer architecture 816 -828

21
2018
Locality-Aware GPU Register File

Hyeran Jeon , Hodjat Asghari Esfeden , Nael B. Abu-Ghazaleh , Daniel Wong
IEEE Computer Architecture Letters 18 ( 2) 153 -156

6
2019
Adaptive Test Generation for Fast Functional Coverage Closure

Azade Nazi , Qijing Huang , Hamid Shojaei , Hodjat Asghari Esfeden
DVCON USA

1
2022
Blockmaestro: Enabling programmer-transparent task-based execution in gpu systems

AmirAli Abdolrashidi , Hodjat Asghari Esfeden , Ali Jahanshahi , Kaustubh Singh
2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture (ISCA) 333 -346

15
2021
Coalescing Operand Register File for Graphical Processing Units

Nael Abu-Ghazaleh , Hodjat Asghari Esfeden , Daniel Wong

3
2022
Enhanced Register Data-Flow Techniques for High-Performance, Energy-Efficient GPUs

Hodjat Asghari Esfeden
University of California, Riverside

2021