Skewed associativity enhances performance predictability

Bodin , Seznec
international symposium on computer architecture 265 -274

35
1995
A New Interconnection Network for SIMD Computers: The Sigma Network

Seznec
IEEE Transactions on Computers 36 ( 7) 794 -801

9
1987
Exploring instruction-fetch bandwidth requirement in wide-issue superscalar processors

Pierre Michaud , Stephan Jourdan , Andre Seznec
international conference on parallel architectures and compilation techniques 2 -10

56
1999
Branch prediction and the performance of interpreters: don't trust folklore

Erven Rohou , Bharath Narasimha Swamy , Andre Seznec
symposium on code generation and optimization 103 -114

20
2015
Dictionary sharing: an efficient cache compression scheme for compressed caches

Biswabandan Panda , Andre Seznec
international symposium on microarchitecture 1 -12

22
2016
Register sharing for equality prediction

Arthur Perais , Andre Seznec , Fernando A. Endo
international symposium on microarchitecture 1 -12

4
2016
Impact of Serial Scaling of Multi-threaded Programs in Many-Core Era

Surya Narayanan , Bharath N. Swamy , Andre Seznec
symposium on computer architecture and high performance computing 36 -41

2
2014
Hardware/Software Helper Thread Prefetching on Heterogeneous Many Cores

Bharath Narasimha Swamy , Alain Ketterlin , Andre Seznec
symposium on computer architecture and high performance computing 214 -221

3
2014
Compressed Cache Layout Aware Prefetching

Niloofar Charmchi , Caroline Collange , Andre Seznec
symposium on computer architecture and high performance computing 25 -28

2019
Dynamic Inter-Thread Vectorization Architecture: Extracting DLP from TLP

Sajith Kalathingal , Sylvain Collange , Bharath N. Swamy , Andre Seznec
symposium on computer architecture and high performance computing 18 -25

7
2016
The strict avalanche criterion randomness test

Julio Cesar Hernandez Castro , José María Sierra , Andre Seznec , Antonio Izquierdo
Mathematics and Computers in Simulation 68 ( 1) 1 -7

107
2005
Practical Multidimensional Branch Prediction

Andre Seznec , Joshua San Miguel , Jorge Albericio
IEEE Micro 36 ( 3) 10 -19

1
2016
EOLE: Toward a Practical Implementation of Value Prediction

Arthur Perais , Andre Seznec
IEEE Micro 35 ( 3) 114 -124

1
2015
The SAC Test: A New Randomness Test, with Some Applications to PRNG Analysis

Julio C. Hernandez , José María Sierra , Andre Seznec
international conference on computational science and its applications 960 -967

12
2004
Yet Another Compressed Cache: A Low-Cost Yet Effective Compressed Cache

Somayeh Sardashti , Andre Seznec , David A. Wood
ACM Transactions on Architecture and Code Optimization 13 ( 3) 27

25
2016
Selecting benchmark combinations for the evaluation of multicore throughput

Ricardo A. Velasquez , Pierre Michaud , Andre Seznec
international symposium on performance analysis of systems and software 173 -182

10
2013
Value Speculation through Equality Prediction

Kleovoulos Kalaitzidis , Andre Seznec
2019 IEEE 37th International Conference on Computer Design (ICCD) 694 -697

2
2019
Performance implications of single thread migration on a chip multi-core

Theofanis Constantinou , Yiannakis Sazeides , Pierre Michaud , Damien Fetis
ACM Sigarch Computer Architecture News 33 ( 4) 80 -91

110
2005
Discrete Cache Insertion Policies for Shared Last Level Cache Management on Large Multicores

Aswinkumar Sridharan , Andre Seznec
international parallel and distributed processing symposium 822 -831

1
2016
Practical and secure PCM systems by online detection of malicious write streams

Moinuddin K. Qureshi , Andre Seznec , Luis A. Lastras , Michele M. Franceschini
high-performance computer architecture 478 -489

89
2011