Implementation of cache coherence protocol for COMA multiprocessor systems based on the scalable coherent interface

摘要: Abstract The Scalable Coherent Interface (SCI) provides high bandwidth, low latency communication in systems with point-to-point links. SCI can also support cache coherence shared memory multiprocessors. Existing Cache-Only Memory Architecture (COMA) are all based on and protocols other than SCI. Hierarchical COMA generally suffer from message latencies. In this paper, we examine the implementation of multiprocessors using protocol. Implementing protocol hierarchical reduces latencies its will reduce directory sizes. work, a system was modified so that it fits addition, new replacement policy is proposed which replaced lines swap storage locations ones fetched into attraction memory. Similar to systems, still gives performance when part left unallocated. However, slightly influenced by initial distribution data across system.