Real time image processing on parallel arrays for gigascale integration

摘要: Portable multimedia systems require high performance, efficiency, and the ability to exploit future gigascale VLSI technology. Limits of fixture on-chip interconnect, as projected in National Technology Roadmap for Semiconductors (NTRS), increase communication costs prevent scaling existing architectural approaches. New architectures must better physical data locality reduce demand on global interconnects. This dissertation presents a system-level approach localize computation an efficient computing platform. Research contributions include system models that capture interconnect-demand describe technologies, systolic synthesis procedures map algorithms area I/O arrays using planar streams. The average 60% more accurate predictions wire than stochastic models. A new architecture is presented streams by processing where it falls. this thesis provide three times performance over previous techniques. Simulation results show can additional speedups 16 exploiting parallelism. array approximately two orders magnitude power DSP general-purpose microprocessors.