Embedding FPGA overlays into configurable Systems-on-Chip: ReconOS meets ZUMA

作者: Tobias Wiersema , Ame Bockhorn , Marco Platzner

DOI: 10.1109/RECONFIG.2014.7032514

关键词: Reconfigurable computingSoftware systemEmbeddingSoftwareField-programmable gate arrayOverlayEmbedded systemVirtual circuitComputer scienceDesign tool

摘要: Virtual FPGAs are overlay architectures realized on top of physical FPGAs. They proposed to enhance or abstract away from the FPGA for experimenting with novel and design tool flows. In this paper, we present an embedding a ZUMA-based virtual fabric into complete configurable system-on-chip. Such is required fully harness potential FPGAs, in particular give circuits access main memory operating system services, enable concurrent operation virtualized non-virtualized circuitry. We discuss our extension ZUMA its ReconOS hardware/software systems. Furthermore, open source flow synthesize configurations FPGA.

参考文章(14)
Christian Plessl, Marco Platzner, Virtualization of Hardware – Introduction and Survey Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA). pp. 63- 69 ,(2004)
William Fornaciari, Vincenzo Piuri, Virtual FPGAs: Some steps behind the physical barriers Lecture Notes in Computer Science. pp. 7- 12 ,(1998) , 10.1007/3-540-64359-1_665
Löic Lagadec, Dominique Lavenier, Erwan Fabiani, Bernard Pottier, Placing, Routing, and Editing Virtual FPGAs field programmable logic and applications. pp. 357- 366 ,(2001) , 10.1007/3-540-44687-7_37
Lukáš Sekanina, Virtual Reconfigurable Circuits for Real-World Applications of Evolvable Hardware Evolvable Systems: From Biology to Hardware. pp. 186- 197 ,(2003) , 10.1007/3-540-36553-2_17
Enno Lübbers, Marco Platzner, ReconOS: Multithreaded programming for reconfigurable computers ACM Transactions in Embedded Computing Systems. ,vol. 9, pp. 8- ,(2009) , 10.1145/1596532.1596540
Andreas Agne, Markus Happe, Ariane Keller, Enno Lubbers, Bernhard Plattner, Marco Platzner, Christian Plessl, ReconOS: An Operating System Approach for Reconfigurable Computing IEEE Micro. ,vol. 34, pp. 60- 71 ,(2014) , 10.1109/MM.2013.110
Roman Lysecky, Kris Miller, Frank Vahid, Kees Vissers, Firm-core Virtual FPGA for Just-in-Time FPGA Compilation (abstract only) Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field-programmable gate arrays - FPGA '05. pp. 271- 271 ,(2005) , 10.1145/1046192.1046247
G. Brebner, The swappable logic unit: a paradigm for virtual hardware field programmable custom computing machines. pp. 77- 86 ,(1997) , 10.1109/FPGA.1997.624607
K. Glette, J. Torresen, M. Yasunaga, Online Evolution for a High-Speed Image Recognition System Implemented On a Virtex-II Pro FPGA adaptive hardware and systems. pp. 463- 470 ,(2007) , 10.1109/AHS.2007.83
Yajun Ha, P. Schaumont, M. Engels, S. Vernalde, F. Potargent, L. Rijnders, H. De Man, A hardware virtual machine for networked reconfiguration rapid system prototyping. pp. 194- 199 ,(2000) , 10.1109/IWRSP.2000.855224