An Area-efficient Non-uniform Filter Bank for Low Overhead Reconfiguration of Multi-standard Software Radio Channelizers
作者： R. Mahesh , A. P. Vinod
DOI: 10.1007/S11265-010-0502-9
关键词: Reconfigurability 、 Software-defined radio 、 Computer science 、 Wideband 、 Filter bank 、 Passband 、 Sampling (signal processing) 、 Computer hardware 、 Virtex 、 Communication channel 、 Real-time computing 、 Base station 、 Control and Systems Engineering 、 Signal processing 、 Theoretical computer science 、 Modelling and Simulation 、 Hardware and Architecture 、 Information Systems
摘要: The channelizer in a software defined radio (SDR) base station extracts individual channels from the digitized wideband input signal at very high sampling rate. must be able to simultaneously extract multiple of non-uniform bandwidths corresponding channel different communication standards. Reconfigurability and low complexity are two key requirements SDR channelizer. A new reconfigurable filter bank (FB) architecture based on interpolation masking technique for channelizers is proposed this paper. FB can used obtaining narrow passband with extremely complexity. Using cascaded structure FB, it possible fractional widths by changing factor. Design example shows that offers reduction 84% over conventional per-channel (PC) approach. has been implemented tested Xilinx Virtex 2v3000ff1152-4 FPGA. Implementation results show area 48.37%, speed improvement 52.7% power 75.9% PC
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