Memory controller having plurality of channels that provides simultaneous access to data when accessing unified graphics memory

作者: Carl K. Mizuyabu , Raymond M. Li , Danny H. M. Cheng , Anthony Asaro , Milivoje Aleksic

DOI:

关键词: Computer scienceMemory controllerData accessGraphicsComputer networkUnified systemCentral processing unitClient data

摘要: An apparatus includes a unified system/graphics memory and controller. The controller is operative to receive client data access requests associated with one or more clients central processing unit (CPU) request CPU, plurality of channels for accessing the memory. provide channels, in parallel, by CPU at least clients. prioritize over control access, based on request.

参考文章(74)
Ronald T. Horan, Gary J. Piccirillo, Gregory N. Santos, Robert Allan Lester, Phillip M. Jones, Accelerated graphics port programmable memory access arbiter ,(1998)
Alexander Perez, Mario D. Nemirovsky, Ralph Haines, Robert J. Divivier, Pipelined microprocessor that pipelines memory requests to an external memory ,(1995)
Aditya Sreenivas, Trung A. Diep, Tuong P. Trieu, Wishwesh A. Gandhi, Steve J. Clohset, Thomas A. Piazza, Arbitration mechanism for a computer system having a unified memory architecture ,(1999)