Transient Analysis of TSV Equivalent Circuit Considering Nonlinear MOS Capacitance Effects
作者： Stefano Piersanti , Francesco de Paulis , Antonio Orlandi , Madhavan Swaminathan , Vittorio Ricchiuti
DOI: 10.1109/TEMC.2015.2414477
关键词: Materials science 、 Transient analysis 、 Transient voltage suppressor 、 Capacitance 、 Nonlinear system 、 Equivalent circuit 、 Silicon 、 Electric potential 、 Electronic engineering 、 Optoelectronics 、 Doping
摘要: An equivalent circuit model for the transient analysis of through-silicon vias (TSV) taking into account nonlinear metal–oxide–semiconductor effects is proposed. The takes behavior doped silicon substrate in presence electric potential difference due to voltage between TSVs. impact time-variant capacitance via and on crosstalk signal propagation analyzed.
sci-hub.se 参考文章(29)
Rao R. Tummala, Introduction to System-On-Package (SOP): miniaturization of the entire system / Rao R. Tummala, Madhavan Swaminathan 1. PEMBUNGKUSAN - SISTEM,Introduction to System-On-Package (SOP): miniaturization of the entire system / Rao R. Tummala, Madhavan Swaminathan. ,vol. 2008, pp. 1- 99 ,(2008)
Clayton R. Paul, Inductance: Loop and Partial ,(2009)
Yang Yi, Yaping Zhou, Xin Fu, Fangyang Shen, Modeling Differential Through-Silicon-Vias (TSVs) with Voltage Dependent and Nonlinear Capacitance ,(2013)
Kiyeong Kim, Jong Min Yook, Junchul Kim, Heegon Kim, Junho Lee, Kunwoo Park, Joungho Kim, Interposer Power Distribution Network (PDN) Modeling Using a Segmentation Method for 3-D ICs With TSVs IEEE Transactions on Components, Packaging and Manufacturing Technology. ,vol. 3, pp. 1891- 1906 ,(2013) , 10.1109/TCPMT.2013.2276050
Yang Yi, Yaping Zhou, A novel circuit model for multiple Through Silicon Vias (TSVs) in 3D IC ieee international d systems integration conference. pp. 1- 4 ,(2013) , 10.1109/3DIC.2013.6702389
Joohee Kim, Jonghyun Cho, Joungho Kim, Jong-Min Yook, Jun Chul Kim, Junho Lee, Kunwoo Park, Jun So Pak, High-Frequency Scalable Modeling and Analysis of a Differential Signal Through-Silicon Via IEEE Transactions on Components, Packaging and Manufacturing Technology. ,vol. 4, pp. 697- 707 ,(2014) , 10.1109/TCPMT.2013.2239362
Lesley Anne Polka, Package Technology to Address the Memory Bandwidth Challenge for Terascale Computing Intel Technology Journal. ,vol. 11, ,(2007) , 10.1535/ITJ.1103.03
Dong Min Jang, Chunghyun Ryu, Kwang Yong Lee, Byeong Hoon Cho, Joungho Kim, Tae Sung Oh, Won Jong Lee, Jin Yu, Development and Evaluation of 3-D SiP with Vertically Interconnected Through Silicon Vias (TSV) electronic components and technology conference. pp. 847- 852 ,(2007) , 10.1109/ECTC.2007.373897
Robert M. Corless, David J. Jeffrey, Donald E. Knuth, A sequence of series for the Lambert W function international symposium on symbolic and algebraic computation. pp. 197- 204 ,(1997) , 10.1145/258726.258783
Wei Yao, Siming Pan, Brice Achkir, Jun Fan, Lei He, Modeling and Application of Multi-Port TSV Networks in 3-D IC IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. ,vol. 32, pp. 487- 496 ,(2013) , 10.1109/TCAD.2012.2228740