Cooperative Mult-thread Parallel Tabu Search with an Application to Circuit Partitioning
作者： Renata M. Aiex , Simone de L. Martins , Celso C. Ribeiro , Noemi de la R. Rodriguez
DOI: 10.1007/BFB0018549
关键词: Thread (computing) 、 Algorithm 、 Adaptive algorithm 、 Tabu search 、 Computer science 、 Guided Local Search 、 Parallel algorithm 、 Parallel computing 、 Combinatorial optimization
摘要: In this work, we propose a cooperative multi-thread parallel tabu search heuristic for the circuit partitioning problem. This procedure is based on cooperation of multiple threads. Each thread implements different variant sequential algorithm, using combination initial solution algorithm and move attribute definition. These threads communicate by exchanging elite solutions. PVM Linda are used in implementation procedure. Numerical results reported set ISCAS benchmark circuits illustrate effectiveness Comparative illustrating efficiency implementations also assessed.
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sci-hub.se 参考文章(29)
Z Li, Y Min, Pseudo-exhaustive testing strategy for large combinational circuits Computer Systems: Science & Engineering. ,vol. 1, pp. 213- 220 ,(1986)
Renato Del Balio, Ernesto Tarantino, Ivan De Falco, Solving the Mapping Problem by Parallel Tabu Search. Applied Informatics. pp. 264- 267 ,(1994)
Madlaine Davis-Moradkhan, Problemes de partitionnement dans la technologie des vlsi Paris 6. ,(1993)
Michel Toulouse, Teodor G. Crainic, Michel Gendreau, Communication Issues in Designing Cooperative Multi-Thread Parallel Searches Springer, Boston, MA. pp. 503- 522 ,(1996) , 10.1007/978-1-4613-1361-8_30
I. De Falco, R. Del Balio, E. Tarantino, R. Vaccaro, Improving search by incorporating evolution principles in parallel Tabu Search world congress on computational intelligence. pp. 823- 828 ,(1994) , 10.1109/ICEC.1994.349949
F Guertin, E Taillard, M Gendreau, P Badeau, J-Y Potvin, A SOLUTION PROCEDURE FOR REAL-TIME ROUTING AND DISPATCHING OF COMMERCIAL VEHICLES Intelligent Transportation: Realizing the Future. Abstracts of the Third World Congress on Intelligent Transport SystemsITS America. ,(1996)
Nicholas Carriero, David Gelernter, Linda in context Communications of the ACM. ,vol. 32, pp. 444- 458 ,(1989) , 10.1145/63334.63337
Sandeep N. Bhatt, Fan R. K. Chung, Arnold L. Rosenberg, Partitioning circuits for inproved testability conference on advanced research in vlsi. ,vol. 6, pp. 91- 106 ,(1986) , 10.1007/BF01759033
Mark A. Franklin, Vasudha Govindan, A general matrix iterative model for dynamic load balancing parallel computing. ,vol. 22, pp. 969- 989 ,(1996) , 10.1016/0167-8191(96)00026-9
M.W. Roberts, P.K. Lala, An algorithm for the partitioning of logic circuits IEE Proceedings E Computers and Digital Techniques. ,vol. 131, pp. 113- 118 ,(1984) , 10.1049/IP-E:19840021