作者: Yan Solihin , Amro Awad , Yipeng Wang
DOI:
关键词: Computer hardware 、 Flat memory model 、 Memory management 、 Real-time computing 、 Sequential access memory 、 Uniform memory access 、 Memory map 、 Registered memory 、 Interleaved memory 、 Semiconductor memory 、 Computer science
摘要: Systems and methods for modeling memory access behavior traffic timing are disclosed. According to an aspect, a method includes receiving data indicative of resulting from instructions executed on processor. The also determining statistical profile the behavior, including tuple statistics behavior. Further, generating clone based use in simulating