作者: Paul Harrison Benson , John Matthew Landry , Dwayne Thomas Crump , Steven Taylor Pancoast
DOI:
关键词: CPU modes 、 Embedded system 、 Power management 、 Interrupt 、 CPU core voltage 、 Computer science 、 CPU time 、 CPU shielding 、 Cycle stealing 、 Application-specific instruction-set processor
摘要: The present invention relates to a computer system having CPU, power management processor with volatile configuration, supply in circuit communication, and preferably non-volatile storage device. controls the regulation of CPU by supply. Prior causing cease providing regulated interrupts via interrupt. Responsive being interrupted interrupt, performs tasks associated imminently ceasing provide CPU. Such may include writing data memory refreshing an alarm value processor. can extend period time before causes while necessary tasks.