作者: Hong Jeong , Bruce R. Musicus
DOI: 10.1007/978-1-4612-4532-2_6
关键词: Path (graph theory) 、 Projection (set theory) 、 Line (geometry) 、 Very-large-scale integration 、 Computer science 、 Process (computing) 、 Electrical element 、 STRIPS 、 Algorithm 、 Chip
摘要: This paper explores line labeling algorithms for extracting the mask layers from a clean drawing representing optical image of VLSI chip. We start by developing suitable world model images, treating chip as multilayer sandwich translucent layers, each which is composed planar and rectilinear strips. The arrangement these strips interpreted according to hierarchical description in combine form electrical elements, turn gates, tum even higher-level building blocks. simple 2-D projection all strip boundaries are preserved but depth layer identification lost. assume that this perfect Our vision problem reverse image-formation process order reconstruct original scene extract masks. To recover information, we show features design constraints on translate into natural scheme lines, junctions, regions defined drawing. present two different first uses constraint propagation algorithm, exploiting junctions reduce set possible interpretations lines. second algorithm attaches series labels image, up path fragments then linking them paths, assigning paths insides outsides within layer. key issue use much knowledge about VLSI, together with hints operator, ambiguity drawing, thereby number sets masks could possibly image. Performance system shown typical CMOS gate. conclude showing how our approach can be used generalize previous interpretation methods projected images 3-D trihedral blocks worlds both opaque transparent surfaces.