Low power semiconductor memory device having a normal mode and a partial array self refresh mode
作者： Byung Deuk Jeon
DOI:
关键词: Memory bank 、 Semiconductor memory 、 Computer hardware 、 Electronic engineering 、 Selection (genetic algorithm) 、 Signal 、 Power (physics) 、 Memory refresh 、 Mode (computer interface) 、 Engineering 、 Memory cell
摘要: A low power semiconductor memory device having a normal mode and partial array self refresh mode. The includes plurality of banks including cell array; control unit for generating pre-bank selection signal related to the bank selection; practically selecting by using in according properties without
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