FPGA implementation of fast running FIR filters
作者： S. Rengaprakash , M. Vignesh , N. Syed Anwar , M. Pragadheesh , E. Senthilkumar
DOI: 10.1109/WISPNET.2017.8299970
关键词: Computer hardware 、 Transpose 、 Finite impulse response 、 Digital signal processing 、 Digital filter 、 Computer science 、 Field-programmable gate array
摘要: Digital filter design using Finite Impulse Response (FIR) filters are predominantly used for various applications pertaining to digital signal processing and wireless communication. Fast running FIR designed the concepts of polyphase decomposition provide speed benefit. In this paper, hardware implementation fast on a Virtex-5 FPGA is proposed compared with two different techniques: optimized transpose structure Distributed Arithmetic (DA) approach. The in paper times faster than usual filter.
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