Computer with expanded addressing capability

作者: John S. Forker , Alexander S. Lushtak

DOI:

关键词: EngineeringCode (cryptography)Standby powerComputer hardwareTerminal (electronics)Block cipher mode of operationDecoding methodsReading (computer)State (computer science)Range (computer programming)

摘要: A computer system has an addressing capability many times greater than the number of address which can be generated by its binary lines through use a plurality addressable banks (14, 16, 18, 22, 30, 34) (memory, peripherals or controls) in each different ranges, (II, III, IV) with several said plural ranges being useable combination for any given mode operation program. Bank selection within range is effected program control first supplying (1) enables bank select decoding latch (28), and (2) data code selecting desired bank, whereupon will latched enabled later normal operation. ROM 18), implemented monolithic circuit form, are selected decoder outputs (D2, D1, D0) cause (40) to energized from non-energized state, thereby eliminating need separate chip-select terminal, standby power consumption. Addressable peripheral equipment controls (30, (non-ROM hardware) mapped (III) containing banks. Writing this automatically goes non-ROM hardware since incapable receiving data. Reading preselecting specific codes.

参考文章(22)
Valdis Grants, Timothy E. Mcadams, Ronald E. Schultz, Memory circuit for programmable machines ,(1980)
Werner Otto Haug, Manfred Illi, Utz G Baitinger, Address selection circuit for storage arrays ,(1974)
Iliff N. Hartman, PROM circuit board programmer ,(1976)
Raymond W. Harris, Selection and power reset circuit ,(1980)
Thomas H. Bennett, Michael F. Wiles, Pulse expanding system for microprocessor systems with slow memory ,(1976)
M Hoff, F Faggin, S Mazor, Memory system for a multi chip digital computer ,(1973)
Ronald E. Schultz, Steven H. Rigg, Processor module for a programmable controller ,(1981)
Vogl N, Sumilas J, Yield enhancement redundancy technique ,(1971)
Wolfgang G. Stehr, Garvin W. Patterson, Memory array selection mechanism ,(1979)