Architectural support for compiler-generated data-parallel program

摘要: To fully realize the advantages of parallel processing demands design efficient communication mechanisms. Existing architectures span a spectrum ranging from message passing to remote-memory access, shared memory and cache-only architectures. These are often used (and designed be used) directly by programmer. However, in future we can expect more programs written high-level languages compiled specific target; compiler will hide details underlying hardware The architecture should then with compiler, not programmer, mind. The goal our work is improve performance for that language architecture. make this task manageable, focus on class data-parallel pick C$\sp*$ as one representative experiments. We evaluate three competing architectures--message-passing, access cache-coherent shared-memory--for set benchmarks respective We show message-passing model has several inherent these benchmarks, resulting less interconnect traffic time spent waiting messages traverse interconnect. On other hand, requires CPU perform significantly per than This overhead destroys much model's advantage. We propose language-oriented retains model, yet (in cooperation compiler) reduces overhead. do so, first identify small low-level synchronization primitives well matched needs C$\sp*$. network interface tuned describe compilation base; includes remote read/write requests plus counter-based support. simulate measure traditional design; measurements demonstrate effective at reducing communication-related