作者: Huei Wang , Tian-Wei Huang , Wei-Heng Lin , James Wang
DOI:
关键词: Electrical engineering 、 Topology (electrical circuits) 、 Power bandwidth 、 Power-added efficiency 、 Transmitter power output 、 Engineering 、 Amplifier 、 Monolithic microwave integrated circuit 、 RF power amplifier 、 CMOS
摘要: A 60-GHz power amplifier (PA) using 65-nm bulk MS/RF CMOS technology is presented in this paper. To meet 10-dBm regulation limit of transmit power, direct-combining topology selected for low-loss and high-efficiency output stage design. The first-order matching networks input, inter-stage are used to cover 57-66-GHz world-wide unlicensed millimeter-wave bands. This MMIC achieves 42% drain efficiency peak added (PAE) 23.4% at 16.7-dB gain, 12.9-dBm saturated biased under supply voltage 1.2-V, with 68.4-mW dc consumption PSAT.