Systems and methods for providing power efficiency via memory latency control
作者： Richard Stewart , Hee Jun Park
DOI:
关键词: Computer science 、 Memory bus 、 CAS latency 、 Stall (fluid mechanics) 、 Electrical efficiency 、 Computer hardware 、 Execution time
摘要: Systems, methods, and computer programs are disclosed for controlling power efficiency in a multi-processor system. The method comprises determining core stall time due to memory access one of plurality cores A execution is determined the cores. ratio versus calculated. dynamically scales frequency vote bus based on time.
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