Design of Quantum Cost and Delay-Optimized Reversible Wallace Tree Multiplier Using Compressors
作者： A. N. Nagamani , Vinod Kumar Agrawal
DOI: 10.1007/978-81-322-2126-5_36
关键词: Multiplication 、 Digital signal processing 、 Wallace multiplier 、 Mathematics 、 Arithmetic circuits 、 Computation 、 Quantum cost 、 Wallace tree multiplier 、 Gas compressor 、 Electronic engineering 、 Algorithm
摘要: Compressors play a specific role in realizing high-speed arithmetic circuits particular multipliers. The increase the demand of fast multiplication has attracted many researchers to design higher order compressors which enhance speed computation by reducing critical path delay processing unit. In this paper, quantum cost and delay-optimized are proposed. designed using existing reversible gates such as Feynman, Fredkin, Peres (PG). Using these optimized compressors, 8 × Wallace multiplier is performance parameters compared with designs literature. It evident from results that exhibits better lesser hence it faster Thus, suitable for FFTs, IFTs modern DSP design.
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