Router with a cache having a high hit probability
作者： Hideyuki Shimonishi , Tutomu Murase , Masayoshi Kobayashi
DOI:
关键词: Bus sniffing 、 Cache algorithms 、 Cache invalidation 、 Least frequently used 、 Page cache 、 Cache coloring 、 Computer science 、 Cache 、 Parallel computing 、 CPU cache
摘要: A router allowing the entry hit probability of cache to be increased is disclosed. The searched using a different mask for each entry. maximum or optimum prefix length determined as upper bits destination address received packet which are not masked by corresponding mask. Alternatively, longest match (LPM). plurality addresses can registered in cache, resulting probability.
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