Bit-slice asynchronous transfer mode switching system
作者： Manabu Kagawa
DOI:
关键词: Transmission (telecommunications) 、 Header 、 Asynchronous Transfer Mode 、 Burst switching 、 Computer hardware 、 Control theory 、 Bit slicing 、 Crossbar switch 、 Cut-through switching 、 Computer science 、 Electronic engineering
摘要: In an asynchronous transfer mode (ATM) switching system, N-byte ATM cell containing a header and user data is received from line circuit N-bit routing information derived the header. The converted into sequence of N parallel bits supplied to first-stage controller generate first control signal. A successive bit switched through header-transfer switch in response signal are cell-transfer same synchronism with switch. second-stage responsive for generating second switches Successive serial form transmission next stage or system.
lens.org 参考文章(4)
Slade E. Smith, Broadband concentrator for packet switch ,(1989)
Osamu Isono, Kazuo Hajikano, Tetsuo Nishino, Tetsuo Tachibana, Toshimasa Fukui, Shunji Abe, Hichiro Hayami, Koso Murakami, Eisuke Iwabuchi, Self-routing switching system with multiple link connections between incoming and outgoing lines ,(1988)
Hiroshi Kuwahara, Noboru Endo, Takahiko Kozaki, Yoshito Sakurai, Mineo Ogino, Cell switching system of asynchronous transfer mode ,(1989)
George G. Robertson, Daniel W. Hillis, Brewster Kahle, Guy L. Steele, Method and apparatus for routing message packets ,(1988)