作者: Michael S. Meredith , Lawrence E. Lewis
DOI:
关键词: Electronic engineering 、 Electrical network 、 Mechanism (biology) 、 Static timing analysis 、 Computer science 、 Development (topology)
摘要: A computer-implemented method and apparatus that automates the entry, modification, verification of timing diagrams for electrical circuits. The also provides an automated mechanism analyzing these verifying relationships specified circuit are met using parts selected circuit.