High mobility FETS using A1203 as a gate oxide
作者： Michael A. Gribelyuk , Paul C. Jamison , Deborah Ann Neumayer , Alessandro C. Callegari , Douglas A. Buchanan
DOI:
关键词: Trap (computing) 、 Gate dielectric 、 Gate stack 、 Optoelectronics 、 Electrical engineering 、 Dielectric 、 Gate oxide 、 Substrate (electronics) 、 Materials science 、 Cmos process 、 Wafer
摘要: A method of forming a high-k dielectric material which exhibits substantially lower amount trap charge within gate stack region is provided. The maintains high-temperatures (250° C. or above) such that the substrate wafer not cooled during various processing steps. Such leads to formation does exhibit hysteric behavior in capacitance-voltage curve as well an increased mobility on FETs using conventional CMOS processing.
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