作者: C. Dou , K. Kakushima , P. Ahmet , K. Tsutsui , A. Nishiyama
DOI: 10.1016/J.MICROREL.2011.10.019
关键词: Electrical conductor 、 Tin 、 Layer (electronics) 、 Resistive random-access memory 、 Power (physics) 、 Materials science 、 Voltage 、 Buffer (optical fiber) 、 Nanotechnology 、 Reset (computing) 、 Optoelectronics
摘要: Abstract We propose a novel resistive switching device with W/CeO 2 /Si/TiN structure by incorporating very thin Si buffer layer in the interface, memory performance of this such as forming voltage, operation power, and window endurance characteristics were found to be remarkably improved compared without layer. This improvement was attributed formation Ce-silicate thus proper introduction oxygen vacancies at interface. The gradual reset process under sweeping voltage quantitatively analyzed parallel conductive filaments model. Our results provide guideline for control further optimizing give new insights into process.