作者: Sambhu Nath Pradhan , Santanu Chattopadhyay
DOI: 10.1007/978-3-642-17881-8_39
关键词: Leakage (electronics) 、 Very-large-scale integration 、 Electronic engineering 、 Real-time computing 、 Multiplexer 、 Binary decision diagram 、 Power minimization 、 Computer science
摘要: Due to the regularity of implementation, multiplexers are widely used in VLSI circuit synthesis. This paper proposes a technique for decomposing function into 2-to-1 performing area-power tradeoff. To best our knowledge this is first ever effort incorporate leakage power calculation multiplexer based decomposition. With respect an initial ROBDD (Reduced Ordered Binary Decision Diagram) representation function, scheme shows more than 30% reduction area, and switching LGSynth91 benchmarks without performance degradation. It also enumerates trade-offs present solution space different weights associated with these three quantities.