Processing of pixel data according to different broadcasting systems

摘要: A coprocessor is incorporated in a processor comprising CPU, an instruction cache, data memory, bus controller, interruption control section and DMA controller. This has parallel sum-of-products arithmetic operation section, comparator, I/O register factor section. frame provided on the input side, stores MUSE or NTSC signals digitized per pixel. The of transfer between input-side memory as well output side memory. Pixel stored processed according to broadcasting systems by switching factors basis software.