Extending IEEE 1588 to fault tolerant clock synchronization
作者： G. Gaderer , R. Holler , T. Sauter , H. Muhr
DOI: 10.1109/WFCS.2004.1377745
关键词: Self-clocking signal 、 Computer science 、 Distributed computing 、 Digital clock manager 、 Packet switching 、 Synchronization 、 Computer network 、 Ethernet 、 Clock synchronization 、 Fault tolerance 、 Deterministic algorithm
摘要: Clock synchronization over packet-oriented networks is an enabling technology for many distributed applications especially in automation. To this end it of great interest to obtain a worst-case bound on the deviation between clocks any two nodes, known as clock precision. This article describes steps involved order achieve higher precision Ethernet-based LANs without degrading fault tolerance and determinism aspects. We explain how statistical time IEEE 1588 could be extended by deterministic algorithm support those features orthogonal fashion.
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