作者: Han Kwang-Ma
DOI:
关键词: Computer science 、 System bus 、 Transistor 、 NAND logic 、 Semiconductor memory 、 Terminal (telecommunication) 、 Communication channel 、 Reading (computer) 、 Line (electrical engineering) 、 Electrical engineering
摘要: first and second NAND gates(G1,G2) for driving writing action by receiving data input of positive/negative signals through terminals(/D, D) a write enable signal other terminal(WE); MOS transistors(Q30, Q40) precharging the bus line in reading action, providing path keep being turned on to form channel between output terminals lines(DB, /DB); thereby reducing number elements power consumption.