Digital phase control using first and second delay lines
作者： Satoshi Nakamura
DOI:
关键词: Clock skew 、 Computer science 、 Clock signal 、 Clock domain crossing 、 Self-clocking signal 、 Phase (waves) 、 Synchronous circuit 、 Electronic engineering 、 Line (text file) 、 Phase control
摘要: A digital phase control method shifts a predetermined number of clock signals having the same frequency and different phases at high precision resolution as whole with its interval maintained to keep interval. The comprises steps preparing fourteen first multi-phase fixed phase, sixteen second signals, locking specific signal particular changing combination be phase-locked shift signals. In addition, in order generate delay line comprising ring-shaped chained buffers may used.
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