作者: Abbas Komijani , None
DOI: 10.7907/EW67-RX66.
关键词: Intermediate frequency 、 Transmitter power output 、 RF power amplifier 、 Baseband 、 Voltage-controlled oscillator 、 Frequency divider 、 Electrical engineering 、 Amplifier 、 Electronic engineering 、 Local oscillator 、 Engineering
摘要: Phased-array systems, a special case of multiple-input-multiple-output (MIMO) take advantage spatial directivity and array gain to increase spectral efficiency. Implementing phased-array system at high frequency in commercial silicon process technology presents several challenges. This thesis focuses on the architectural circuit-level trade-offs involved design silicon-based fully integrated transmitters. As first implementation, four-element 24GHz 0.18µm CMOS transmitter with power amplifiers is presented. On-chip use substrate-shielded slow-wave transmission lines for impedance matching can generate up 14dBm output power. The employs two-step upconversion architecture 4.8GHz as intermediate (IF) uses single 19.2GHz synthesizer serving local oscillator (LO) generator. phased-array, employing LO phase shifting architecture, achieves 23dB peak null-ratio when all four elements are used, demonstrates beam steering range covering signal incident angles, support data rate 500Mbps quadrature phase-shift keying (QPSK) baseband signal. second implementation modified an 4-element 77GHz Silicon-Germanium (SiGe) transceiver Two-step conversion, envisioning dual-mode 77GHz/24GHz operation, used both receiver paths. A differential 52GHz generated by on-chip voltage-controlled (VCO) distributed radio (RF) performed ports RF mixers continuous analog shifters. LO, IF 26GHz, dividing VCO factor 2 using cross-coupled injection-locked divider. amplifier 17.5dBm added efficiency (PAE) 14% best performance demonstrated silicon. path 40dB conversion 2.5GHz bandwidth maximum 12.5 dBm. measured results demonstrate feasibility phased-arrays wireless communication vehicular radar applications.