作者: Z. Zhou , B. Pain , E. Fossum
DOI: 10.1109/ISSCC.1998.672422
关键词: Electronic circuit 、 Kernel (image processing) 、 Physics 、 CMOS sensor 、 Integrator 、 Electronic engineering 、 Cardinal point 、 CMOS 、 Pixel 、 Miniaturization
摘要: In addition to advantages of lower power and system miniaturization through camera-on-a-chip implementation, the CMOS active pixel image sensor (APS) enables development smart imagers by integrating custom signal processing circuits on focal plane. This APS imager is capable enhancing noise ratio (S/N) under low illumination summation signals from neighboring pixels. On-chip S/N improvement in demonstrated averaging or binning. Pixel binning implemented a primarily designed for frame-transfer. That implementation suffers extraneous pick-up high-residual fixed-pattern (FPN) due use single-ended column integrator. has improved kernel summing fully-differential topology. The performance greatly reducing FPN temporal circuit noise. multi-resolution suited application light-level-adaptive imaging.