A family of differential NMOS analog circuits for a PCM codec filter chip
作者： D. Senderowicz , S.F. Dreyer , J.H. Huggins , C.F. Rahim , C.A. Laber
DOI: 10.1109/JSSC.1982.1051855
关键词: Pulse-code modulation 、 NMOS logic 、 Transistor array 、 Standby power 、 Operational amplifier 、 Analogue electronics 、 Computer science 、 Electrical engineering 、 Electronic engineering 、 Chip 、 Codec 、 Filter (video) 、 Differential amplifier
摘要: A new NMOS PCM codec filter uses low-noise fully differential circuits to achieve supply rejection of 36 dB and idle channel noise 6 dB/SUB rnc0/. The die size is 24 mm/SUP 2/ the active standby power 150 mW/5 mW.
harvard.edu
sci-hub.se 参考文章(6)
B.J. Hosticka, Dynamic CMOS amplifiers IEEE Journal of Solid-state Circuits. ,vol. 15, pp. 881- 886 ,(1980) , 10.1109/JSSC.1980.1051488
D. Senderowicz, J.H. Huggins, A low-noise NMOS operational amplifier IEEE Journal of Solid-state Circuits. ,vol. 17, pp. 999- 1008 ,(1982) , 10.1109/JSSC.1982.1051853
G. Jacobs, D. Allstot, R. Brodersen, P. Gray, Design techniques for MOS switched capacitor ladder filters IEEE Transactions on Circuits and Systems. ,vol. 25, pp. 1014- 1021 ,(1978) , 10.1109/TCS.1978.1084414
K.-C. Hsieh, P. Gray, A low-noise chopper-stabilized differential switched-capacitor filtering technique international solid-state circuits conference. ,vol. 16, pp. 708- 715 ,(1981) , 10.1109/ISSCC.1981.1156191
P.R. Gray, D. Senderowicz, H. Ohara, B.M. Warren, A single-chip NMOS dual channel filter for PCM telephony applications international solid-state circuits conference. ,vol. 14, pp. 981- 991 ,(1979) , 10.1109/JSSC.1979.1051306
D.G. Marsh, B.K. Ahuja, T. Misawa, M.R. Dwarakanath, P.E. Fleischer, V.R. Saari, A single-chip CMOS PCM codec with filters international solid-state circuits conference. ,vol. 16, pp. 308- 315 ,(1981) , 10.1109/JSSC.1981.1051594