作者: Uwe Vehlies
DOI: 10.1155/1995/76861
关键词: Algorithm 、 Electronic design automation 、 Computation 、 Computer science 、 Parallel computing 、 Massively parallel systems 、 Transformation (function) 、 Digital signal processing algorithms 、 Hardware description language 、 Vector processor 、 Design flow
摘要: A formal approach for the transformation of computation intensive digital signal processing algorithms into suitable array processor architectures is presented. It covers complete design flow from algorithmic specifications in a high-level programming language to architecture descriptions hardware description language. The itself divided manageable steps and implemented CAD-tool DECOMP which allows exploration different short time. With presented data independent can be mapped onto architectures. To allow this, known mapping methodology extended handle inhomogeneous dependence graphs with nonregular dependences. implementation an important step towards automation massively parallel systems.