CMOS small signal switchable impedence and voltage adjustable terminator with hysteresis receiver network

作者: David T. Hui

DOI:

关键词: Bandgap voltage referenceEngineeringElectronic engineeringElectronic circuitMesh analysisEquivalent circuitReference circuitRL circuitVoltage referenceElectrical engineeringLogic level

摘要: CMOS small signal switchable impedence and voltage adjustable terminator with an integrated hysteresis receiver network for carrying logic level signals connecting data from a network's first circuit to second in which input terminal connects the act as on line passing said circuit. The has reference coupled devices back source each other tuned center node, their bodies connect upper lower power supplies respectively. An is connected one side of node node. above common supplied terminator's corresponding control nfet pfet mirror whose are also respectively supply turn voltages. path establishes,the swing being that approximating ideal 50 ohm split resistor terminator. adjustment section provides impedance circuits tuning incoming up down. A forms part terminator/circuit

参考文章(16)
Ian Moir, Thao Lane, William G. Hance, Frederic Caussarieu, Albert E. Cohen, Advanced network processor ,(1983)
Narasipur G. Anantha, Robert A. Henle, James L. Walsh, Integrated circuit interconnection structure having precision terminating resistors ,(1977)
Stephen H. Diaz, James A. Pinyan, John F. O'Neill, Joseph M. Carey, J. Mark Elder, Distributed digital loop carrier system using coaxial cable ,(1995)
Stephen A. Deschaine, Richard Schroder, E. Lawrence Read, Gary D. Hanson, Sharlene C. Lin, Daniel P. Lyon, Michael H. Hanlon, Processor device for terminating and creating synchronous transport signals ,(1996)
Florin Oprescu, Roger W. Van Brunt, High-speed dominant mode bus for differential signals ,(1993)
Roy L. Soto, Wiley J. Ehrke, Robert J. Homkes, ISDN testing device and method ,(1989)
Kevin Gale Foreman, Paul Jay Miller, Sean Michael Rieb, Network conditioning insert ,(1994)