A 10-GHz global clock distribution using coupled standing-wave oscillators
作者： F. O'Mahony , C.P. Yue , M.A. Horowitz , S.S. Wong
关键词: Time-to-digital converter 、 Clock domain crossing 、 Digital clock manager 、 Clock gating 、 Clock signal 、 Electronic engineering 、 Synchronous circuit 、 Clock network 、 Engineering 、 Clock skew 、 Electrical engineering
摘要: In this paper, a global clock network that incorporates standing waves and coupled oscillators to distribute high-frequency signal with low skew jitter is described. The key design issues involved in generating on chip are discussed, including minimizing wire loss within an available technology. A standing-wave oscillator, which distributed oscillator sustains ideal lossy wires, introduced. grid architecture comprised of differential low-swing buffers presented, along compact circuit model for networks oscillators. measured results prototyped operating at 10 GHz fabricated 0.18-/spl mu/m 6M CMOS logic process presented. technique proposed on-chip measurements subpicosecond precision.
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