Adiabatic logic based low power multiplexer and demultiplexer
作者： Shruti Konwar , Thockchom Birjit Singha , Soumik Roy , Reginald H. Vanlalchaka
DOI: 10.1109/ICCCI.2014.6921808
关键词: Integrated injection logic 、 Digital electronics 、 Logic family 、 Adiabatic circuit 、 Computer science 、 Multiplexer 、 Electrical engineering 、 Pass transistor logic 、 Resistor–transistor logic 、 Logic gate
摘要: Minimizing power of digital circuits is always the first priority for VLSI designers. Following this trend, paper presents a CMOS-based new design approach low adiabatic 8∶1 Multiplexer and 1∶8 Demultiplexer. Some standard logic styles like PFAL, ECRL, 2n2n2p are investigated, which bettered by proposed logic. The simulation carried out in NI-Multisim software at 0.5 µm CMOS technology frequency range 200MHz – 800MHz.
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