Interleaving based variable ordering methods for ordered binary decision diagrams
作者： Goichi Ootomo , Chikahiro Hori , Hiroshige Fujii
关键词: Benchmark (computing) 、 Boolean function 、 Mathematics 、 Variable (computer science) 、 Electronic circuit 、 Theoretical computer science 、 Cad tools 、 Binary decision diagram 、 Interleaving 、 Algorithm
摘要: Ordered binary decision diagrams (OBDDs) are efficient representations of Boolean functions and have been widely used in various computer-aided design tools. Since the size an OBDD depends on variable ordering, it is important to find a good order for manipulation OBDDs. In particular, same multiple functions, since handled at time most The paper describes new ordering algorithms output circuits. use interleaving, while conventional appending. For some benchmark circuits, OBDDs successfully generated by using algorithms, they not algorithms. Consequently, effective allow us apply OBDD-based CAD tools wider classes
acm.org
sci-hub.st 参考文章(11)
S. Malik, A.R. Wang, R.K. Brayton, A. Sangiovanni-Vincentelli, Logic verification using binary decision diagrams in a logic synthesis environment international conference on computer aided design. pp. 6- 9 ,(1988) , 10.1109/ICCAD.1988.122451
D. E. Ross, R. Kapur, M. R. Mercer, Functional approaches to generating orderings for efficient symbolic representations design automation conference. pp. 624- 627 ,(1992) , 10.5555/113938.149646
Bryant, Graph-Based Algorithms for Boolean Function Manipulation IEEE Transactions on Computers. ,vol. 35, pp. 677- 691 ,(1986) , 10.1109/TC.1986.1676819
Yusuke Matsunaga, Taeko Kakuda, Masahiro Fujita, On variable ordering of binary decision diagrams for the application of multi-level logic synthesis european design automation conference. pp. 50- 54 ,(1991) , 10.5555/951513.951525
F. Brglez, A neutral netlist of 10 combinational benchmark circuits and a target translator in FORTRAN Proc. Intl. Symp. Circuits and Systems, 1985. ,(1985)
N. Ishiura, H. Sawada, S. Yajima, Minimization of binary decision diagrams based on exchanges of variables international conference on computer aided design. pp. 472- 475 ,(1991) , 10.1109/ICCAD.1991.185307
Shin-ichi Minato, Nagisa Ishiura, Shuzo Yajima, Shared binary decision diagram with attributed edges for efficient Boolean function manipulation Conference proceedings on 27th ACM/IEEE design automation conference - DAC '90. pp. 52- 57 ,(1990) , 10.1145/123186.123225
Karl S. Brace, Richard L. Rudell, Randal E. Bryant, Efficient implementation of a BDD package Conference proceedings on 27th ACM/IEEE design automation conference - DAC '90. pp. 40- 45 ,(1990) , 10.1145/123186.123222
M. Fujita, H. Fujisawa, Y. Matsunaga, Variable ordering algorithms for ordered binary decision diagrams and their evaluation IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. ,vol. 12, pp. 6- 12 ,(1993) , 10.1109/43.184839
F. Brglez, D. Bryan, K. Kozminski, Combinational profiles of sequential benchmark circuits international symposium on circuits and systems. pp. 1929- 1934 ,(1989) , 10.1109/ISCAS.1989.100747