The MAJC architecture: a synthesis of parallelism and scalability
作者： S.S. Tse , A.W. Conigliam , S. Chaudhry , J. Chan , M. Tremblay
DOI: 10.1109/40.888700
关键词: Computer architecture 、 Simultaneous multithreading 、 Instruction-level parallelism 、 Multithreading 、 Scalability 、 Temporal multithreading 、 Parallel computing 、 Speculative multithreading 、 Very long instruction word 、 MAJC 、 Computer science 、 Thread (computing)
摘要: The MAJC architecture enhances application performance by exploiting parallelism at multiple levels-instruction, data, thread, and process. Supporting vertical multithreading, speculative chip multiprocessors, the scalable VLIW is also capable of advanced speculation predication treats all data types similarly.
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