作者: Cliff Zitlaw , Frankie Fariborz Roohparvar
DOI:
关键词: Dynamic random-access memory 、 Sense amplifier 、 Electronic engineering 、 Memory refresh 、 Registered memory 、 Memory-mapped I/O 、 Computer science 、 Memory controller 、 Semiconductor memory 、 Address bus
摘要: A memory and system reduce power consumption by reducing a supply level. The includes input circuitry coupled to data communication bus. has first second threshold detection levels detect voltage transitions of signals communicated on the device changes in synchronization with other memories In one embodiment, is performed while devices are down state. provided changed power-down