Parallel packetized interconnect with simplified data link layer
作者： Jack Regula
DOI:
关键词: Interconnection 、 Electronic engineering 、 Transmission (telecommunications) 、 Frame (networking) 、 Data link layer 、 Tracking (particle physics) 、 Computer science 、 Computer hardware 、 Signal
摘要: In a first embodiment of the present invention, method for error-correcting in parallel interconnect transmitting device is provided, comprising: detecting frame transition transmission from to receiving device; tracking time between and response signal corresponding received an error transmission; restarting portion error, wherein size restart based upon tracked transition.
lens.org 参考文章(14)
Andrew Z. Muszynski, William M. Chu, Simultaneous bidirectional transceiver ,(1991)
Timothy E. Hoglund, Mark A. Reber, David M. Weber, Stephen M. Johnson, John M. Adams, Single chip protocol engine and data formatter apparatus for off chip host memory to local memory transfer and conversion ,(1998)
Sandip Kundu, Scan design for double-edge-triggered flip-flops ,(2002)
James Mitchell, Christopher L. Chappell, Packet processing in switched fabric networks ,(2004)
Matthew James Fischer, Tracy D. Mallory, Method of providing synchronous transport of packets between asynchronous network nodes in a frame-based communications network ,(2001)
Shayan Zhang, Bradford L. Hunter, Memory and method for sensing data in a memory using complementary sensing scheme ,(2006)
Mark T. McClear, Christopher Wellheuser, Transceiver circuit with transition detection ,(1995)
Ashish A. Pandya, Runtime adaptable protocol processor ,(2004)
Deane A. Gardner, Philip Hsueh, Printing device communication protocol ,(2004)
Holger Stadali, Carmen Wagner, Guenter Hofmann, Stefan Koehler, Marco Breiling, Synchronization device and device for generating a synchronization signal ,(2005)