Self-aligned bit line under word line memory array
作者： Matthew J. Breitwisch , Hsiang-Lan Lung , Chung Hon Lam , Erh-Kun Lai
DOI:
关键词: Computer science 、 Electronic engineering 、 Merge (version control) 、 Optoelectronics 、 Field-effect transistor 、 Bit line 、 Memory array 、 Transistor 、 Row
摘要: A memory device is described that comprises a plurality of bit lines and an array vertical transistors arranged on the lines. word formed along rows in which comprise thin film sidewalls line material so merge row direction, do not column to form The provide “surrounding gate” structures for embodiments are field effect transistors. Memory elements electrical communication with fully self-aligned process provided aligned without additional patterning steps.
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