High voltage charge pump and related circuitry

作者: David K. Park

DOI:

关键词: Clock signalVoltage dividerClock gatingPhysicsCharge pumpVoltageCPU core voltageElectrical engineeringDropout voltageHigh voltage

摘要: Charge pump and related circuitry (30) for operation at low power supply voltages includes voltage elevating (51), clock level shifting (53), separator (55) charge (57). The (51) receives a VDD provides an elevated intermediate output V1. (53) input signal the shifts maximum of CLOCK1 from to V1 this signal, labeled SHIFTED CLOCK, as output. Clock CLOCK non-overlapping, clocks CLOCKA, CLOCKB, CLOCKC, CLOCKD, each having 57 utilizes signals provide high VOUT.

参考文章(10)
Melvin Marmet, Kenneth W. Ouyang, Fast switching charge pump ,(1986)
Wen-Foo Chern, High efficiency charge pump ,(1991)
Yiu-Fai Chan, Allen L. Evans, Monolithic CMOS low power digital level shifter ,(1982)
Giovanni Santin, Sebastiano D'Arrigo, Giovanni Naso, Negative-voltage charge pump with feedback control ,(1991)
Richard T. Simko, Wallace E. Tchon, William H. Owen, Integrated rise-time regulated voltage generator systems ,(1979)
Akihiro Yamazaki, Tomotaka Saito, Charge pump circuit ,(1989)