作者: David K. Park
DOI:
关键词: Clock signal 、 Voltage divider 、 Clock gating 、 Physics 、 Charge pump 、 Voltage 、 CPU core voltage 、 Electrical engineering 、 Dropout voltage 、 High voltage
摘要: Charge pump and related circuitry (30) for operation at low power supply voltages includes voltage elevating (51), clock level shifting (53), separator (55) charge (57). The (51) receives a VDD provides an elevated intermediate output V1. (53) input signal the shifts maximum of CLOCK1 from to V1 this signal, labeled SHIFTED CLOCK, as output. Clock CLOCK non-overlapping, clocks CLOCKA, CLOCKB, CLOCKC, CLOCKD, each having 57 utilizes signals provide high VOUT.