Third order sigma delta oversampled analog-to-digital converter network with low component sensitivity

摘要: An improved modulator network for an interpolative oversampled (sigma-delta) analog-to-digital converter comprises a second-order modulator, which performs double integration of error between its digital output signal and analog input signal, first-order single supplied thereto from the modulator. The modulators supply their signals to cancellation circuit suppresses in decimation filter quantization noise arising exhibits significantly reduced sensitivity practical nonidealities that normally limit resolution converters this type, i.e., component matching, amplifier nonlinearity, finite gain, settling time, dynamic range.