VLSI implementation of a configurable IP Core for quantized discrete cosine and integer transforms
作者： Chi-Chia Sun , Philipp Donner , Jürgen Götze
DOI: 10.1002/CTA.774
关键词: Scaling 、 Discrete cosine transform 、 CORDIC 、 Quantization (physics) 、 Codec 、 Trigonometric functions 、 Electronic engineering 、 Integer transform 、 Computer science 、 Very-large-scale integration 、 Computational science
摘要: In this paper, a low-complexity and highly integrated IP Core for image/video transformations is presented. It can perform quantized 8×8 DCT 8 × 8/4 4 H.264 integer transforms on the presented configurable architecture using shift–add arithmetic operations. The MPEG-4/H.264 experimental circuit simulation results show that reconfigurable modules CORDIC-Scaler not only approximate arbitrary scaling values different video standards efficiently but also achieve very high throughput retain good transformation quality compared with default methods in terms of PSNR. Therefore, proposed suitable multi-purpose Video Codecs SoC designs. Copyright © 2011 John Wiley & Sons, Ltd.
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