SEU Mitigation Techniques for Advanced Reprogrammable FPGA in Space

摘要: FPGAs are becoming increasingly attractive for use in space applications due to their reconfiguration and signal processing capabilities, as well increasing speed capacity. Traditional SRAM-based FPGAs, however, highly sensitive the ionising radiation environment space, making them prone radiation-induced memory upsets. In this thesis, design techniques mitigating such upsets implemented, tested evaluated, with purpose of enabling a replacement conventional radiation-hardened or antifuse Xilinx commercial FPGAs. A test framework using an exchangeable payload is developed run on Virtex-5 FPGA. A application selected used compare gains costs related different levels redundancy FPGA configuration scrubbing methods. comparing soft error mitigation methods, results availability, resource usage, mean time failure faults considered. Realistic satellite orbit scenarios considered, complete example presented. The product work set recommendations regarding applications.