作者: J.G. Peterson
DOI: 10.1109/JSSC.1979.1051300
关键词: Signal 、 Cost effectiveness 、 Signal processing 、 Mixed-signal integrated circuit 、 Comparator 、 Engineering 、 Electronic engineering 、 Linearity 、 Digital signal 、 Electrical engineering 、 Digital down converter
摘要: The design and measured performance of a fully parallel monolithic 8-bit A/D converter is reported. required comparators combining logic were designed fabricated with standard high-performance triple-diffused technology. A bipolar comparator circuit giving good high input impedance described. Circuit operation reported at sample rates up to 30 megasamples per second (MS/s), analog signal power frequencies 6 MHz. Full linearity was achieved. An SNR 42-44 dB observed 5.3