IC wafer for identification of circuit dies after dicing
作者： Smith Adam C , Ventrone Sebastian T , Liu Wen , Habib Nazmul , Adams Janice M
DOI:
关键词: Offset (computer science) 、 Die (manufacturing) 、 Wafer 、 Equidistant 、 Wafer dicing 、 Integrated circuit 、 Electrical engineering 、 Computer science
摘要: Aspects of the present disclosure provide an integrated circuit (IC) wafer having a plurality dies each bounded by set scribe lines. The IC structure includes: reference features respectively positioned in first layer one dies. feature die is equidistant from respective lines for die, and identification second has distinct offset vector indicative positional difference between relative to other die.
lens.org 参考文章(9)
Alberto Pagani, Traceable integrated circuits and production method thereof ,(2011)
Zain Saidin, Carl Hess, Sergio Edelstein, Christophe Fouquet, Savitha Nanjangud, Systems and methods for detecting design and process defects on a wafer, reviewing defects on a wafer, selecting one or more features within a design for use as process monitoring features, or some combination thereof ,(2009)
Daniele Alfredo Brambilla, Marco Natale Valtolina, Method and structures for indexing dice ,(2004)
Shigenari Aoki, Chip ID applying method suitable for use in semiconductor integrated circuit ,(2007)
Stephen G. Sheck, Semiconductor alignment aid ,(2004)
Ingrid B. Peterson, Ed Yum, Methods and systems for detecting defects in a reticle design pattern ,(2008)
Sachio Uto, Hidetoshi Nishiyama, Toshifumi Honda, Method and apparatus for reviewing defects ,(2009)
Stan Stokowski, David Alles, Methods and systems for inspecting reticles using aerial imaging at off-stepper wavelengths ,(2003)