Programmable pin impedance reduction on multistandard input/outputs

作者: Sergey Y Shumarayev

DOI:

关键词: PhysicsInductanceElectrical elementCapacitive sensingElectrical engineeringElectrical impedanceElectronic engineeringField-programmable gate arrayDifferential signalingProgrammable logic deviceCapacitance

摘要: Programmable logic devices, such as field programmable gate arrays, may have input/output (I/O) circuitry that can be programmed for either differential or single-ended signaling. I/O pins coupled to typically high parasitic input pin capacitance during also inductance. Additional impedance circuit elements capacitive inductive devices are in the produce a compensatory reduces, if not substantially eliminates, effects of and/or inductance

参考文章(6)
Yohan U. Frans, Barry W. Daly, Nhat M. Nguyen, Yueyong Wang, Method and apparatus for multi-mode driver ,(2003)
A. Thanachayanont, A. Payne, VHF CMOS integrated active inductor Electronics Letters. ,vol. 32, pp. 999- 1000 ,(1996) , 10.1049/EL:19960669
Philip Pan, Xiaobao Wang, Gopinath Rangan, Yan Chong, Bonnie I. Wang, In Whan Kim, Chiakang Sung, Joseph Huang, Khai Nguyen, Programmable logic integrated circuit devices with differential signaling capabilities ,(2001)